Instruction Set Summary

PwnHero Notation Used in Instruction Set Summary Explanation of Italic Expressions in Source Form Column abc — A or B or CCR abcdxys — A or B or CCR or D or X or Y or SP abdxys — A or B or D or X or Y or SP msk8 — 8-bit mask (some assemblers require #msk8) opr8i — 8-bit immediate value opr16i — 16-bit immediate value opr8a — 8-bit address used with direct address mode opr16a — 16-bit address value oprx0_xysp — Indexed addressing postbyte code: oprx3,–xys Predecrement X or Y or SP by 1 . . . 8 oprx3,+xys Preincrement X or Y or SP by 1 . . . 8 oprx3,xys– Postdecrement X or Y or SP by 1 . . . 8 oprx3,xys+ Postincrement X or Y or SP by 1 . . . 8 oprx5,xysp 5-bit constant offset from X or Y or SP or PC abd,xysp Acc. A or B or D offset from X or Y or SP or PC oprx3 — Any positive integer 1 . . . 8 for pre/post increment/decrement oprx5 — Any integer in the range –16 . . . +15 oprx9 — Any integer in the range –256 . . . +255 oprx16 — Any integer in the range –32,768 . . . 65,535 rel9 — Label of branch destination within –512 to +511 locations xys — X or Y or SP xysp — X or Y or SP or PC Operators + — Addition – — Subtraction & — Logical AND + — Logical OR (inclusive) ⊕ — Logical exclusive OR × — Multiplication ÷ — Division M — Negation. One’s complement (invert each bit of M) : — Concatenate ⇒ — Transfer ⇔ — Exchange Condition Codes Columns – — Status bit not affected by operation. 0 — Status bit cleared by operation. 1 — Status bit set by operation. ∆ — Status bit affected by operation. ⇓ — Stat. bit may be cleared or remain set, but is not set by operation. ⇑ — Status bit may be set or remain cleared, but is not cleared by operation. ? — Status bit may be changed by operation, but the final state is not defined CPU Register Notation Accumulator A — A or a Accumulator B — B or b Accumulator D — D or d Index Register X — X or x Index Register Y — Y or y Stack Pointer — SP, sp, or s Program Counter — PC, pc, or p Condition Code Register — CCR or c Address Mode Notation INH — Inherent; no operands in object code IMM — Immediate; operand in object code DIR — Direct; operand is the lower byte of an addr. from $0000 to $00FF EXT — Operand is a 16-bit address REL — Two’s complement relative offset; for branch instructions IDX — Indexed (no extension bytes); includes: 5-bit constant offset from X, Y, SP, or PC Pre/post increment/decrement by 1 . . . 8 Accumulator A, B, or D offset IDX1 — 9-bit signed offset from X, Y, SP, or PC; 1 extension byte IDX2 — 16-bit signed offset from X, Y, SP, or PC; 2 extension bytes [IDX2] — Indexed-indirect; 16-bit offset from X, Y, SP, or PC [D, IDX] — Indexed-indirect; accumulator D offset from X, Y, SP, or PC Machine Coding dd — 8-bit direct address $0000 to $00FF (high byte assumed to be $00). ee — High-order byte of a 16-bit constant offset for indexed addressing. eb — Exchange/Transfer post-byte. ff — Low-order 8 bits of a 9-bit signed constant offset for indexed addr., or low-order byte of a 16-bit constant offset for indexed address. hh — High-order byte of a 16-bit extended address. ii — 8-bit immediate data value. jj — High-order byte of a 16-bit immediate data value. kk — Low-order byte of a 16-bit immediate data value. lb — Loop primitive (DBNE) post-byte. ll — Low-order byte of a 16-bit extended address. mm — 8-bit immediate mask value for bit manipulation instructions. Set bits indicate bits to be affected. rr